BBN Butterfly

The BBN Butterfly was a massively parallel computer built by Bolt, Beranek and Newman in the 1980s. It was named for the "butterfly" multi-stage switching network around which it was built. Each machine had up to 512 CPUs, each with local memory, which could be connected to allow every CPU access to every other CPU's memory, although with a substantially greater latency (roughly 15:1) than for its own. The CPUs were commodity microprocessors. The memory address space was shared.

The first generation used Motorola 68000 processors, followed by a 68010 version.[1] The Butterfly connect was developed specifically for this computer. The second or third generation, GP-1000 models used Motorola 68020's and scaled to 256 CPUs. The later, TC-2000 models (called "Monarchs") used Motorola MC88100's, and scaled to 512 CPUs.[2]

The Butterfly was initially developed as the VoiceFunnel, a router for the ST-II protocol intended for carrying voice and video over wideband networks. The Butterfly hardware was later used for the router of DARPA's high-speed descendant of ARPANET, the Satellite Wideband Network. This network later became the Terrestrial Wideband Network.

The Butterfly began with a proprietary operating system called Chrysalis, but moved to a Mach kernel operating system in 1989. While the memory access time was non-uniform, the machine had SMP memory semantics, and could be operated as a symmetric multiprocessor.

The largest configured system with 128 processors was at the University of Rochester Computer Science Department.[3] Most delivered systems had about 16 processors. No known configurations appear to be in museums. At least one system is thought to be sitting within a DARPA autonomous vehicle.

TotalView, the parallel program debugger developed for the Butterfly, outlived the platform and was ported to a number of other massively parallel machines.

See also

References

  1. ↑ Rettberg, R; Wyman, С; Hunt, D.; Hoffman, M.; Carvey, P.; Hyde, B.; Clark, W.; Kraley, M. (August 1979). "Development of a Voice Funnel". System: Design Report. Bolt Beranek and Newman Inc. Report No. 4098.
  2. ↑ Amestoy, Patrick R.; Daydé, Michel J.; Duff, Iain S.; Morère, Pierre (October 9, 1992), "Linear Algebra Calculations on a virtual shared memory computer", Int Journal of High Speed Computing (published 1992), 7, pp. 21–43, CiteSeerX 10.1.1.37.8448Freely accessible
  3. ↑ Leblanc, T. J.; Scott, M.L.; Brown, C.M. (September 1, 1988), Large-Scale Parallel Programming: Experience with the BBN Butterfly Parallel Processor, University of Rochester Computer Science Department

External links

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